The present invention relates generally to performance monitoring and fault detection and location systems and more particularly, to systems for rapid and reliable detection and location of faults in electronic digital systems.
One of the oldest prior art fault detection methods is the parity check. More recently, the parity check has been combined with signature circuits. However, such prior art systems are not able to detect all simultaneous combinations of faults and are not able to locate faults that are detected. The inability to locate faults is tolerable for "hard" faults or permanent faults that persist. This is because operation of the system can be discontinued for trouble shooting and a "hard" fault can be traced, such as by signal tracing with an oscilloscope or logic analyzer. However, this inability to locate faults is not tolerable for "soft" faults or transient faults that occur and then go away because, by the time the signal can be traced, the "soft" fault is no longer present. Further, this inability to locate faults is not tolerable for "glitch" tracing because a "glitch" is a short transient condition that occurs and then goes away before it can be traced using prior art fault location methods.
Prior art performance monitoring circuitry has been implemented with a parity circuit to combine many monitored signals into a single parity signal and with a single signature circuit to detect a fault in response to the parity signal. Such systems can detect odd combinations of simultaneous faults, such as one simultaneous faults or five simultaneous faults, but cannot detect even combinations of faults, such as two simultaneous faults or six simultaneous faults. Alternatively, such systems can detect even combinations of simultaneous faults, but cannot detect odd combinations faults. Further, although such systems can detect faults, they cannot locate faults. Hence, time consuming manual signal tracing is conventionally used to locate a fault after being detected by such systems.
Accordingly, it is a feature of the present invention to provide a fast fault localization system that is applicable to any digital sequential circuitry. Another feature of the invention is the provision of a fast fault localization system that detects even multiples of faults. A further feature of the present invention is to provide a fast fault localization system that detects intermittent problems such as noise-induced errors. Yet another feature of the invention is the provision of a fast fault localization system that captures information about the location of a problem at the same time that it detects the fault.